TIME SWITCH MEMORY

PURPOSE:To simplify a circuit configuration by inputting write data from a transfer gate provided on the head of a memory cell train and executing successively write, outputting read-out data from each data line and executing arbitrarily read-out. CONSTITUTION:At the time of data write, as for a data input applied through a write amplifier 14, clock signals which become alternately '1' are applied to transfer gates 211, 212, 213,... of a write side from clock lines 231, 232. As a result, memory cells 111, 112, 113,... are shifted successively. When data is stored in all memory cells, when an address for arbitrary read-out is applied to an address decoder 17, the decoder 17 decodes it, and sets the designated address line in address lines 191, l92, 193,... to '1'. In such a way, data is read out to a data line 5 from the memory cell in the designated sequence.