INTERFACE CIRCUIT

PURPOSE:To execute the loop test of a desired line by a small number of memories by providing a first and a second synchronization circuits, a first and a second selectors, a first and a second loop recognition circuits, and a third and a fourth selectors. CONSTITUTION:The circuit is constituted so that a line state supervisoy bit in an ST frame in each input signal of one direction R and the other direction S is written in different write-in bits W1, W2 of one memory, and when they are read out in parallel, only a read out bit at the position of the state supervisory bit of the desired line related to a loop command is selected and looped. Thus, since the loop test in both the directions can be executed by memory, the loop test of the desired line is executed by a small number of the memories.