SEMICONDUCTOR INTEGRATED CIRCUIT FOR PROCESSING SIGNAL OF DRAW TYPE OPTICAL DISK

PURPOSE:To improve error correction capacity by permitting an error correction circuit to execute erasure correction using a flag when the error flag is stored in a storage means at the time of former decoding. CONSTITUTION:In an ECC signal processing part 210, data stored in RAM is supplied from an internal data bus 1 to a syndrome (sy) calculation circuit 211 and sy-calculation is executed. The calculated result is given to an error word correction logic circuit 220 and a GF operation part 230. In the GF operation part 230, an error pattern is calculated and a prescribed error is corrected in the error word correction logic circuit 220. The result is stored in RAM. When the error flag is stored in RAM at the time of former decoding, the error correction circuit 220 executes erasure correction using the flag. Thus, two symbols can be corrected by erasure correction even if an audio flag is not used and high error correction capacity can be displayed without using RAM for audio flag.