DEAD LOCK PROOFING SYSTEM

PURPOSE:To improve the reliability of a device by preparing a clock time constant as a parameter corresponding to the effective time of a clock pulse each time a controller reacts, and executing monitor not by a timer but by clock pulse width when malfunction is generated. CONSTITUTION:For each control position, a T (parameter) cycle clock generator 9 is operated to be enabled only during the time for the selective control reaction of each controller, and each time control is outputted, the clock is loaded through a multiplexer 12 and rationality with the control signal is checked (AND or EOR). Therefore, the rationality with the control signal can be confirmed by monitoring either the normal confirmation for the pulse width of the T cycle or the control reaction confirmation within TXm (reaction) time when abnormality is generated. Thus, dead lock can be speedily recognized, the control can be immediately moved to retry and the reliability of the system is improved.