SEMICONDUCTOR DEVICE

PURPOSE:To contrive a reduction in the size of a semiconductor device, whose leads are connected to the external terminals of a semiconductor chip, by a method wherein a conductor, to which a fixed potential is applied, is provided on the surface of each metal wiring interposing a dielectric between...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: IMAI TOMIO, KAMATA CHIYOSHI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To contrive a reduction in the size of a semiconductor device, whose leads are connected to the external terminals of a semiconductor chip, by a method wherein a conductor, to which a fixed potential is applied, is provided on the surface of each metal wiring interposing a dielectric between the metal wiring and the conductor. CONSTITUTION:A conductor 7c, to which a fixed potential is applied, is provided on the surface of each metal wire 7a interposing a dielectric 7b between the wire 7a and the conductor 7c. As a result, a parallel connection by-pass capacitor constituted using this metal wiring 7a connected with a lead wiring 4 for power supply use, to which a power supply is applied, as an electrode on one side and using the conductor 7c, to which the fixed potential is applied, as the other electrode can be formed within the occupation area of this metal wiring 7a. Thereby, the size of a package is reduced and a reduction in the size of a semiconductor device is contrived.