INTERRUPTION CONTROL SYSTEM

PURPOSE:To improve efficiency for operating a local processor by interrupting the local processor after completely writing data from a host processor by a circuit composed of a One-Shot and a Flip-Flop. CONSTITUTION:This system is composed of a FIFO memory 2 to hold the data from a host processor 3,...

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Bibliographische Detailangaben
Hauptverfasser: NAGASE RYOICHI, SAKAMAKI TSUTOMU
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To improve efficiency for operating a local processor by interrupting the local processor after completely writing data from a host processor by a circuit composed of a One-Shot and a Flip-Flop. CONSTITUTION:This system is composed of a FIFO memory 2 to hold the data from a host processor 3, local processor 1 to set the data in the FIFO memory to a D/A converter 7, D/A converter 7 to convert the data to an analog voltage by being set by the local processor, current / voltage conversion circuit 8 to convert the analog voltage outputted from the D/A converter to a current, and interruption control circuit 6 to generate an interruption signal to the local processor 1 when the data are completely written from the host processor 3 to the FIFO 2. Thus, since the interruption signal to the local processor is generated only once even when the plural data are written, the efficiency for operating the local processor can be prevented from being lowered by the continuous input of the interruption signal.