LOGIC CIRCUIT
PURPOSE:To realize a stable ultrahigh speed circuit by providing a clamp circuit clamping a level of an output node of a logical section in parallel with a FET or a component deciding a power supply, and using the clamp circuit so as to make a level difference between the output node of the logical...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | PURPOSE:To realize a stable ultrahigh speed circuit by providing a clamp circuit clamping a level of an output node of a logical section in parallel with a FET or a component deciding a power supply, and using the clamp circuit so as to make a level difference between the output node of the logical section and the power supply constant against a change in the power voltage. CONSTITUTION:A clamp circuit 107 is provided in parallel between a gate electrode of a FET and an N pole of a Schottky diode formed with a gate electrode and a source electrode of FETs 201, 204 of a next stage circuit 200, that is, a negative power supply. Thus, the circuit acts like making the level difference between the electrodes constant against the power voltage fluctuation. Thus, the current change in the next stage is much reduced. Moreover, the clamp circuit 107 consists of the FETs 201, 204 and a Schottky diode, so long as the current flowing to the clamp circuit 107 depends on other component, the current flowing to the next stage is unchanged against the dispersion in the Vth of the FET. Thus, a current Iout is made stable. |
---|