INTEGRATED CIRCUIT PACKAGE

PURPOSE: To reduce switching noise by incorporating a passive semiconductor carrier, for coupling an active integrated circuit chip and an insulation capacitor construction to a power supply pad grid of an active chip into an integrated circuit package and locating a power supply insulating capacitor directly below each chip. CONSTITUTION: A carrier 2 produces parallel stripes 4 of regularly arranged P+ and N+ at its surface and wells. In the first wire plane, a first conductor line 5 is connected to a stripe 4 in a low ohmic state, and between the first conductor lines 5, a second conductor line 6 is connected to a P+-carrier material in a low ohmic state in the surface region of the carrier 2. A third conductor line 8 is coupled to a power supply coupling pad supplying a positive voltage VD, and a fourth conductor line 9 is coupled to a power supply coupling pad supplying the ground potential GND. By so doing, junctions of N+ stripe 4 and P+ carrier 2 are biased in the reverse direction. As a result, the capacitance of depletion layer created by the above constitutes an insulating capacitor and is realized as a power supply for the active chip 1.