IC PACKAGE
PURPOSE:To make short a wiring pattern on a printed wiring board, to make possible a reduction in the propagation delay time of a signal, to reduce the propagation delay time of the signal due to a wiring in an IC package and further, to obtain the IC package capable of reducing AC noise, by a metho...
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| creator | IWASAKI KAZUYA KAMOSHITA SEIJI KURIHARA RYOICHI |
| description | PURPOSE:To make short a wiring pattern on a printed wiring board, to make possible a reduction in the propagation delay time of a signal, to reduce the propagation delay time of the signal due to a wiring in an IC package and further, to obtain the IC package capable of reducing AC noise, by a method wherein the package is formed into a hexagon. CONSTITUTION:In an IC package 1, in which a semiconductor integrated circuit chip 3 is housed and from which lead terminals 2 are led out, the external shape of the package 1 is formed into a hexagon. For example, a flat type IC package 1 having lead terminals 2 of 24 pins is constituted into such a structure that it has a hexagonal form and 4 lead terminals 2 are provided on each of the sides of the hexagonal form. Moreover, an IC chip 3, which has a quadrangular external shape and is provided with connecting pads along the sides of the quadrangular external shape, is provided in the above IC package 1 in such a way that it is connected by 4 to the lead terminals 2 in 6 directions through bonding wires 4 by the shortest distance. Thereby, the hexagonal IC package can be packaged on a printed-wiring board in a high density and the wiring between the IC packages can be made shortest. |
| format | Patent |
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CONSTITUTION:In an IC package 1, in which a semiconductor integrated circuit chip 3 is housed and from which lead terminals 2 are led out, the external shape of the package 1 is formed into a hexagon. For example, a flat type IC package 1 having lead terminals 2 of 24 pins is constituted into such a structure that it has a hexagonal form and 4 lead terminals 2 are provided on each of the sides of the hexagonal form. Moreover, an IC chip 3, which has a quadrangular external shape and is provided with connecting pads along the sides of the quadrangular external shape, is provided in the above IC package 1 in such a way that it is connected by 4 to the lead terminals 2 in 6 directions through bonding wires 4 by the shortest distance. Thereby, the hexagonal IC package can be packaged on a printed-wiring board in a high density and the wiring between the IC packages can be made shortest.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; SEMICONDUCTOR DEVICES</subject><creationdate>1991</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19910301&DB=EPODOC&CC=JP&NR=H0348449A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19910301&DB=EPODOC&CC=JP&NR=H0348449A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>IWASAKI KAZUYA</creatorcontrib><creatorcontrib>KAMOSHITA SEIJI</creatorcontrib><creatorcontrib>KURIHARA RYOICHI</creatorcontrib><title>IC PACKAGE</title><description>PURPOSE:To make short a wiring pattern on a printed wiring board, to make possible a reduction in the propagation delay time of a signal, to reduce the propagation delay time of the signal due to a wiring in an IC package and further, to obtain the IC package capable of reducing AC noise, by a method wherein the package is formed into a hexagon. CONSTITUTION:In an IC package 1, in which a semiconductor integrated circuit chip 3 is housed and from which lead terminals 2 are led out, the external shape of the package 1 is formed into a hexagon. For example, a flat type IC package 1 having lead terminals 2 of 24 pins is constituted into such a structure that it has a hexagonal form and 4 lead terminals 2 are provided on each of the sides of the hexagonal form. Moreover, an IC chip 3, which has a quadrangular external shape and is provided with connecting pads along the sides of the quadrangular external shape, is provided in the above IC package 1 in such a way that it is connected by 4 to the lead terminals 2 in 6 directions through bonding wires 4 by the shortest distance. Thereby, the hexagonal IC package can be packaged on a printed-wiring board in a high density and the wiring between the IC packages can be made shortest.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1991</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZODydFYIcHT2dnR35WFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8V4BHgbGJhYmJpaOxkQoAQAQvRtp</recordid><startdate>19910301</startdate><enddate>19910301</enddate><creator>IWASAKI KAZUYA</creator><creator>KAMOSHITA SEIJI</creator><creator>KURIHARA RYOICHI</creator><scope>EVB</scope></search><sort><creationdate>19910301</creationdate><title>IC PACKAGE</title><author>IWASAKI KAZUYA ; KAMOSHITA SEIJI ; KURIHARA RYOICHI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH0348449A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1991</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>IWASAKI KAZUYA</creatorcontrib><creatorcontrib>KAMOSHITA SEIJI</creatorcontrib><creatorcontrib>KURIHARA RYOICHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>IWASAKI KAZUYA</au><au>KAMOSHITA SEIJI</au><au>KURIHARA RYOICHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>IC PACKAGE</title><date>1991-03-01</date><risdate>1991</risdate><abstract>PURPOSE:To make short a wiring pattern on a printed wiring board, to make possible a reduction in the propagation delay time of a signal, to reduce the propagation delay time of the signal due to a wiring in an IC package and further, to obtain the IC package capable of reducing AC noise, by a method wherein the package is formed into a hexagon. CONSTITUTION:In an IC package 1, in which a semiconductor integrated circuit chip 3 is housed and from which lead terminals 2 are led out, the external shape of the package 1 is formed into a hexagon. For example, a flat type IC package 1 having lead terminals 2 of 24 pins is constituted into such a structure that it has a hexagonal form and 4 lead terminals 2 are provided on each of the sides of the hexagonal form. Moreover, an IC chip 3, which has a quadrangular external shape and is provided with connecting pads along the sides of the quadrangular external shape, is provided in the above IC package 1 in such a way that it is connected by 4 to the lead terminals 2 in 6 directions through bonding wires 4 by the shortest distance. Thereby, the hexagonal IC package can be packaged on a printed-wiring board in a high density and the wiring between the IC packages can be made shortest.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS SEMICONDUCTOR DEVICES |
| title | IC PACKAGE |
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