DESIGN OF SEMICONDUCTOR DEVICE

PURPOSE:To enable the dielectric breakdown lifetime of a semiconductor device in an electrical field to be evaluated by a method wherein a drain avalanche is made to occur in a micro MOS transistor, and the induced holes are introduced into a gate insulating film. CONSTITUTION:The voltage of a drain is set higher than those of a source, a gate, and a substrate, and the drain voltage is made to vary as a parameter to evaluate the dielectric breakdown lifetime of a gate insulating film. A micro MOS transistor (channel length=1.0mum, channel width=15mum) is provided, a gate, a source and a board are grounded, and an accelerated breakdown test of the gate insulating film is executed using the a drain voltage as a parameter. The gate insulating film of this MOS transistor is 22nm in thickness. A horizontal axis and a vertical axis are correspondent to a stress time and a gate current respectively. A gate insulating film starts being damaged when a drain voltage (Vd) reaches to a low voltage of 11.3V, and a gate current keeps increasing until the gate insulating film is broken down and a time needed for breaking down the insulating film can be easily estimated.