STORAGE DEVICE
PURPOSE:To effectively utilize the storage area of a storage means by executing an access in a normal mode or executing an access in a page mode whose speed in higher than it in accordance with whether address data is in the vicinity of a point in which the upper bit is varied or not. CONSTITUTION:T...
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| creator | FUJIKI SUGURU KAJIWARA TADAYUKI |
| description | PURPOSE:To effectively utilize the storage area of a storage means by executing an access in a normal mode or executing an access in a page mode whose speed in higher than it in accordance with whether address data is in the vicinity of a point in which the upper bit is varied or not. CONSTITUTION:The device is provided with a normal mode access timing means 12 which can access a storage means 13, and a page mode access timing means 11 which can access the storage means 13 at a higher speed than that of the normal mode access timing means 12. In such a state, in the case address data from an address generating means 8 is an address being in the vicinity of a point in which the upper bit is varied, the address is delivered to the normal mode access timing means 12, and in other case, the address is delivered to the page mode access timing means 11. In such a way, in the case the storage means 13 is used as a bit map memory, even in the case of an area containing the point in which the upper bit of the address is varied, an unusable area is not generated in a dynamic memory and the memory can be utilized effectively. |
| format | Patent |
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CONSTITUTION:The device is provided with a normal mode access timing means 12 which can access a storage means 13, and a page mode access timing means 11 which can access the storage means 13 at a higher speed than that of the normal mode access timing means 12. In such a state, in the case address data from an address generating means 8 is an address being in the vicinity of a point in which the upper bit is varied, the address is delivered to the normal mode access timing means 12, and in other case, the address is delivered to the page mode access timing means 11. In such a way, in the case the storage means 13 is used as a bit map memory, even in the case of an area containing the point in which the upper bit of the address is varied, an unusable area is not generated in a dynamic memory and the memory can be utilized effectively.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; IMAGE DATA PROCESSING OR GENERATION, IN GENERAL ; PHYSICS</subject><creationdate>1991</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19911114&DB=EPODOC&CC=JP&NR=H03255551A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19911114&DB=EPODOC&CC=JP&NR=H03255551A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>FUJIKI SUGURU</creatorcontrib><creatorcontrib>KAJIWARA TADAYUKI</creatorcontrib><title>STORAGE DEVICE</title><description>PURPOSE:To effectively utilize the storage area of a storage means by executing an access in a normal mode or executing an access in a page mode whose speed in higher than it in accordance with whether address data is in the vicinity of a point in which the upper bit is varied or not. CONSTITUTION:The device is provided with a normal mode access timing means 12 which can access a storage means 13, and a page mode access timing means 11 which can access the storage means 13 at a higher speed than that of the normal mode access timing means 12. In such a state, in the case address data from an address generating means 8 is an address being in the vicinity of a point in which the upper bit is varied, the address is delivered to the normal mode access timing means 12, and in other case, the address is delivered to the page mode access timing means 11. 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CONSTITUTION:The device is provided with a normal mode access timing means 12 which can access a storage means 13, and a page mode access timing means 11 which can access the storage means 13 at a higher speed than that of the normal mode access timing means 12. In such a state, in the case address data from an address generating means 8 is an address being in the vicinity of a point in which the upper bit is varied, the address is delivered to the normal mode access timing means 12, and in other case, the address is delivered to the page mode access timing means 11. In such a way, in the case the storage means 13 is used as a bit map memory, even in the case of an area containing the point in which the upper bit of the address is varied, an unusable area is not generated in a dynamic memory and the memory can be utilized effectively.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING IMAGE DATA PROCESSING OR GENERATION, IN GENERAL PHYSICS |
| title | STORAGE DEVICE |
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