STORAGE DEVICE

PURPOSE:To effectively utilize the storage area of a storage means by executing an access in a normal mode or executing an access in a page mode whose speed in higher than it in accordance with whether address data is in the vicinity of a point in which the upper bit is varied or not. CONSTITUTION:T...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: FUJIKI SUGURU, KAJIWARA TADAYUKI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To effectively utilize the storage area of a storage means by executing an access in a normal mode or executing an access in a page mode whose speed in higher than it in accordance with whether address data is in the vicinity of a point in which the upper bit is varied or not. CONSTITUTION:The device is provided with a normal mode access timing means 12 which can access a storage means 13, and a page mode access timing means 11 which can access the storage means 13 at a higher speed than that of the normal mode access timing means 12. In such a state, in the case address data from an address generating means 8 is an address being in the vicinity of a point in which the upper bit is varied, the address is delivered to the normal mode access timing means 12, and in other case, the address is delivered to the page mode access timing means 11. In such a way, in the case the storage means 13 is used as a bit map memory, even in the case of an area containing the point in which the upper bit of the address is varied, an unusable area is not generated in a dynamic memory and the memory can be utilized effectively.