SYNCHRONIZING INSTRUCTING CIRCUIT

PURPOSE:To prevent the operation interruption of a communication system from being continued for a long time by defining a synchronizing request signal as a synchronizing instructing signal based on any abnormality generation condition when the number of the synchronizing request signals sent out fr...

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1. Verfasser: AOYANAGI HIDEHITO
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To prevent the operation interruption of a communication system from being continued for a long time by defining a synchronizing request signal as a synchronizing instructing signal based on any abnormality generation condition when the number of the synchronizing request signals sent out from a reception station for fixed time in the past is larger than a threshold value. CONSTITUTION:Synchronizing request signals 11-1 to 11-n to be sent from the (n) number of respective reception stations are detected by a synchronizing request signal reception circuit 1 of a #1 control part 5-1, for example, and a synchronizing request signal reception pulse 12 is outputted from the synchronizing request signal reception circuit 1 and applied to a counter circuit 2 and an AND gate 4. The counter circuit 2 counts the number of the synchronizing request signal reception pulses 11-1 for the fixed time in the past and outputs a count value 13. A comparator circuit 3 considers the state of generating the abnormal synchronizing request signal when the count value 13 is larger than the threshold value set in advance, and a gate signal 14 with a logic value '0' is outputted to close the AND gate 4. When the AND gate 4 is opened, the synchronizing request signal reception pulse 12 is passed through the AND gate 4 and applied to an OR circuit 6.