SOURCE COUPLED FILED EFFECT TRANSISTOR DIFFERENTIAL CIRCUIT

PURPOSE:To make a chip small in size by a method wherein a first and a second FET are so arranged as to make a common source sandwiched between them as opposed to each other, and a third and a fourth FET are arranged so as to compensate the variation of the first and the second FET in characteristics. CONSTITUTION:As the sources and the drains of FETs are different from each other in direction, provided that a threshold difference between a first FETQ21 and a second FETQ22 is represented by DELTAVth, the threshold voltage VL of a circuit can be represented by a formula, VL=VG3=VG4+DELTAVth, when Id3=Id4. Then, the input voltages VG3 and VG4 are given by the output of a level shift circuit, when Vsh, is expressed in term of vector quantity, as FETQ21 and FETQ22 are different from each other in a drain source direction, provided that a threshold difference between a first FETQ21 and a second FETQ22 is represented by DELTAVth, a formula, VG1-Vsh= VG2-Vsh-DELTAVth'-DELTAVth, is satisfied. Then, as the drain and the source of the FETQ12 and FETQ21 are arranged in the same direction, formulas, DELTAVth'=DELTAVLth and VG1=VG2, are satisfied, so that difference between FETs in characteristic caused by the difference of FETs in arrangement direction of their drains and sources can be compensated.