COMPOUND SEMICONDUCTOR DEVICE

PURPOSE:To prevent the decrease of a switching rate, and to enable operation at high speed by forming a carrier-trap region to the surface or near the surface of the active region of an FET. CONSTITUTION:An N-type active region 2 is shaped onto a GaAs substrate 1 through ion implantation. Proton or...

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1. Verfasser: ONODERA KAZUMASA
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To prevent the decrease of a switching rate, and to enable operation at high speed by forming a carrier-trap region to the surface or near the surface of the active region of an FET. CONSTITUTION:An N-type active region 2 is shaped onto a GaAs substrate 1 through ion implantation. Proton or oxygen is ion-implanted to the surface or near the surface of the intermediate region of a gate electrode 6 and a drain electrode 7 by acceleration energy in dosage of 30keV, thus forming a trap region 3. A gate depletion layer 4 and a drain region 9 are isolated spatially. The same region as gate length between a gate and a drain must be ensured in the plane region of the trap region to which ions must be implanted. Holes toward the gate electrode are trapped by the deep level of the trap region, and cannot reach up to the gate depletion layer or near it.