MEMORY CONTROLLER

PURPOSE:To flexibly control a memory in a system where memory elements different in response time exist together by providing a response time setting means which arbitrarily rewrites plural preset times in a response signal generating means. CONSTITUTION:The logical address outputted by a CPU 2 is converted to the address of another system by an address converting means 7, and memories 1a to 1c are accessed by this address, and the preset time corresponding to this address is counted by a response time generating means 8 to generate a response signal. Address conversion contents and the preset time are freely changed by software. Thus, a memory controller 5 is obtained which can freely set correspondence between the logical address outputted from the CPU 2 and the actual address of the memory space and can freely change the characteristic of the response signal generating part 8 in accordance with this setting even in the system where memory elements 1a to 1c different in response time exist together.