MANUFACTURE OF SEMICONDUCTOR DEVICE

PURPOSE:To realize high integration by determining with the same photolithographic process respective positions of an emitter region, a base region, and a collector region of a bipolar transistor, a gate region of a MOS transistor, and an isolation region among the MOS transistors. CONSTITUTION:A si...

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Bibliographische Detailangaben
1. Verfasser: NISHIKAWA KIICHI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To realize high integration by determining with the same photolithographic process respective positions of an emitter region, a base region, and a collector region of a bipolar transistor, a gate region of a MOS transistor, and an isolation region among the MOS transistors. CONSTITUTION:A silicon film 22 as a gate electrode of a MOS transistor and a silicon film 22 for forming an emitter region and a collector region of a bipolar transistor are patterned with the same process, and a source-drain region, an emitter region, and a base region are formed in self-alignment manner with respect to nitrided film 23 provid on the silicon film 22, an isolation region among MOS transistors can be formed in self-alignment manner with respect to a silicon film of a gate electrode of the MOS transistor. Accordingly, a margin for an error of mask registration of the gate region of the MOS transistor and the isolation region is eliminated and hence a fine structure bipolar transistor and a MOS transistor can be formed on the same semiconductor substrate 1. Hereby, high integration can be realized.