COMMUNICATION INTERFACE

PURPOSE:To regulate the return timing of data to a master station supplied from a CPU to a communication interface by permitting the return of the data from the communication interface to a host device only in a period where a busy signal from the CPU is dissipated. CONSTITUTION:When an output comma...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: AMAMIYA HIDETO, KISHIMURA KATSUHIRO, OUCHI KOJI, KIMURA TETSUO, KOBAYASHI KOJI, NARA TSUKASA, KATSUMATA ATSUSHI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To regulate the return timing of data to a master station supplied from a CPU to a communication interface by permitting the return of the data from the communication interface to a host device only in a period where a busy signal from the CPU is dissipated. CONSTITUTION:When an output command is issued from the master station 1 to the communication interface 5, a data output signal of (H) level appears at the output signal terminal 5-2 of the communication interface 5 at the reception completion time t1 of the output command. The CPU 6 receives the data output signal of (H) level, and fetches digital output DO supplied from the communication interface 5, and also, the CPU 6 performs the dissipation of the busy signal to a busy signal input terminal 5-1 i.e., fall to an (L) level at a point t3 elapsing latency time tACW from a point t1 where processing time tAC can be sufficiently obtained. The communication interface 5 permits the return of the data to the master station 1 prohibited until then.