DATA PROCESSOR

PURPOSE:To improve user's handleablity by transferring the data of the same real addresses in a specific storage area started from the leading address of the specific storage area repeatedly twice by a direct memory access. CONSTITUTION:The data processor is constituted of a computer bus 7, an...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: TSUTSUMI MASAHITO, WAKABAYASHI TSUKIMI, SUZUKI JUNZO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To improve user's handleablity by transferring the data of the same real addresses in a specific storage area started from the leading address of the specific storage area repeatedly twice by a direct memory access. CONSTITUTION:The data processor is constituted of a computer bus 7, an input part 8, a frame buffer 9, an output part 10, data buses 11, 13, 15 a temporary buffer 1, and a processing unit (PE) 14. The data of the same real addresses in the specific storage area started from the leading addresses of the specific storage area are transferred repeatedly twice by direct memory access, so that even when operation causing the conversion of data bit length is applied to processing elements, the generation of a trouble can be prevented. Consequent ly, user's handleablity can be improved.