LSI TESTER

PURPOSE:To test an LSI individually by providing an operation mode instructing means to instruct an ordinary operation mode or a test operation mode. CONSTITUTION:When an ordinary operation is performed, no signal is inputted to an external input pin A, and the disable pin control gate 3 of each LSI...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: SATO KAZUNORI, YOKOYA SHIGEKI, KAWAGUCHI YOSHIHITO, IKEUCHI KAZUHIRO
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:PURPOSE:To test an LSI individually by providing an operation mode instructing means to instruct an ordinary operation mode or a test operation mode. CONSTITUTION:When an ordinary operation is performed, no signal is inputted to an external input pin A, and the disable pin control gate 3 of each LSI 1 is controlled with the output of a logical circuit group 2. Meanwhile, when a logic value 0 is supplied to the external input pins A, B, a mode is set at a test mode, and the input on one side of an AND gate 4 goes high, and the control gate 3 is controlled with the address input of external input pins C-E. For example, when all the input of the external input pins C-E are set at the logic values 0, addresses go to 0s, and 0-th LSI 1 is designated via a decoder 5, and all the LSIs other than that are disabled, and a designated LSI is set as the one to be tested. In such a way, it is possible to easily test only a targeted LSI without receiving influence from another LSIs.