INTER-PROCESSOR COMMUNICATION SYSTEM

PURPOSE:To attain the inter-processor communication by providing the processor identifiers and processor control blocks into a shared memory in number equal to the number of processors and using an input clock interruption for each processor. CONSTITUTION:The processor control blocks 1 including the processor identifiers 11 and the process request fields 12 are provided into a shared memory 5 in number equal to the number of processors for execution of the state control of each processor. When a processor 21 makes another processor 31 perform a process, the block 1 having an identifier 11 equal to that of the subject proces sor 31 is detected. At the same time, a request flag is set up in a request field 12 is response to a desired process. Then an inter-processor interruption generat ing circuit 32 of a processor module 3 starts an interruption to the processor 31 with an interruption request signal 34. The processor 31 checks the request of the field 12 of its own block 1 and carries out a requested process. As a result, the inter-processor communication is attained.