BUFFER MEMORY DEVICE

PURPOSE:To variably and effectively use the area of a directory part and a buffer memory data part by providing an error detecting means, an address comparing circuit, an error level register and an error detection control circuit, etc. CONSTITUTION:When an error is detected from the reading data of a buffer memory data part 50 or the reading data of a directory part 40 by an error detector 51 or an error detector 42, retry is executed by a retry processing circuit in a buffer memory control part 60. After that, the address information of a block, which is judged as the error, are sent as address information 04 from the part 60 to an error detection control circuit 20 and stored to error level registers 20-1 - 20-N. When a memory access is executed from a CPU to the block which is shown by the stored address, coincidence is detected by comparing circuits 23-1 - 23-N in the circuit 20 and the data of the block is made ineffective by a coincidence detecting signal 26. Thus, the areas of the parts 40 and 50 can be variably and effectively utilized.