FRAME SYNCHRONIZING CIRCUIT

PURPOSE:To attain the frame synchronization establishment of plural strings of reception data by providing a frame counter control circuit so as to generate a timing pulse corresponding to a multi-frame pulse. CONSTITUTION:While the synchronizing processing is in hunting, a frame counter circuit 40a stops its operation by a load signal (r). When a pattern detection circuit 10a detects a frame pulse F3, a counter load value (q) is outputted from a frame counter control circuit 50a and a frame counter circuit 40a starts counting. Then a detection signal is sent from the pattern detection circuit 10a in the order of F4 F1 F2 F3 sequentially, and timing signals T4, T1, T2, T3 corresponding to them are outputted from the frame counter circuit 40a under the control of the frame counter control circuit 50a. Thus, since a pattern is detected from any of the frame pulses F1-F4, the synchronization is established in a short time.