INFORMATION PROCESSOR

PURPOSE:To prevent a faulty device from giving the adverse influence to a common bus by monitoring this bus via each device of an information processor and therefore detecting the troubles of devices to facilitate the isolation of the faulty device. CONSTITUTION:A system processor 1 contains a monit...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: ODAWARA KOICHI, SUDO KIYOSHI, SAKURAI YASUTOMO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To prevent a faulty device from giving the adverse influence to a common bus by monitoring this bus via each device of an information processor and therefore detecting the troubles of devices to facilitate the isolation of the faulty device. CONSTITUTION:A system processor 1 contains a monitor device 1A which monitors a common bus 5 and turns on an error signal when a parity error is detected at an access. While the instruction processors 21 - 2n, the input/output controllers 31 - 3n, and the main memories 41 - 4n contain the monitor devices 2A - 4A respectively. These devices 2A - 4A monitor the bus 5 and sends an interruption signal to the processor 1 to inform the trouble of a device in a relevant group in the case a parity error is detected at an access and at the same time the error signal received from the device 1A is kept OFF. As a result, the trouble of each device can be detected and also the adverse influence due to the occurrence of a bus fight, etc., can be avoided to the bus 5.