SEMICONDUCTOR DEVICE

PURPOSE:To eliminate the erroneous operation of a circuit or breakdown of an IC by electrically isolating an isolation layer around an island to be possibly at a lower potential than that of the isolation layer from an isolation layer of other elements. CONSTITUTION:An n type buried layer 4 in which...

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Hauptverfasser: TAGUCHI KAZUYO, KODA TOYOMASA
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To eliminate the erroneous operation of a circuit or breakdown of an IC by electrically isolating an isolation layer around an island to be possibly at a lower potential than that of the isolation layer from an isolation layer of other elements. CONSTITUTION:An n type buried layer 4 in which antimony is employed as an impurity source is formed including a small signal element part on a p-type epitaxial layer 3. An n type diffused layer 2 is extended into the layer 3 by thermal diffusion of this case, and its top is connected to the layer 4. That is, a p-type epitaxial layer 3a of a section to become a power transistor is isolated from a p-type epitaxial layer 3b of a section to become a small signal circuit. An n-type epitaxial layer 5 is formed, and an element isolation diffused layer and a collector punching n type diffused layer 7 are selectively formed therein. That is, an n-type layer is presented between the power transistor and a lateral p-n-p transistor, its island becomes a power source potential VCC, and even if the island of the power transistor becomes negative potential, it is not affected to the lateral p-n-p, and no erroneous operation of the circuit occurs.