LOGIC CIRCUIT

PURPOSE:To realize a high speed of a fall operation by a method wherein a current path via a third MOS transistor is formed and a drop in a back gate bias effect used to increase a potential by an amount of a built-in potential and a drop in a gate-source voltage are relaxed when a second bipolar transistor is turned ON. CONSTITUTION:When a logic gate is constituted by connecting a plurality of MOS transistors 41, 47, 49 in parallel, the MOS transistor 47 of a corresponding MOS gate is connected between an output signal output terminal 39 and a ground potential 24 in parallel with the following: the MOS transistor 49, on the side of the ground potential 24, involved in a fall of a totem pole type Bi-CMOS gate to which two bipolar transistors 43, 51 are connected in series; the bipolar transistor 51; an impedance element 53. Accordingly, a base potential of the bipolar transistor 51 on the side of the ground potential 24 becomes higher than the ground potential; a drop in a driving force by a back gate bias effect of the MOS transistor 47 connected between a base and a collector is reduced. Thereby, a high speed of a fall operation can be realized.