DATA ACCESS DEVICE

PURPOSE:To switch an access circuit according to a speed by judging whether data access between a CPU and a peripheral device is carried out at a high speed or normal speed. CONSTITUTION:The CPU 1 reads in a decision flag regarding the processing speed of data to be sent or received. Consequently, w...

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1. Verfasser: YAGAWA KEN
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To switch an access circuit according to a speed by judging whether data access between a CPU and a peripheral device is carried out at a high speed or normal speed. CONSTITUTION:The CPU 1 reads in a decision flag regarding the processing speed of data to be sent or received. Consequently, when it is judged that the data should be accessed at the high speed, a chip select signal switching circuit 4 inputs a control signal from the CPU 1 to connect a contact 5 to a terminal (b) and ground the chip select signal input terminal of a memory 2. Consequently, the memory 2 becomes able to operate at all time. The CPU 1 outputs an address signal to an address decoding circuit 3 and the memory 2. Specific data is inputted from the memory 2 to the CPU 1.