METHOD AND DEVICE FOR INTERRUPTION CONTROL

PURPOSE:To attain a high speed process with the interruption control by connecting the interruption occurrence report signal lines of the interruption generators to the different data lines of a CPU. CONSTITUTION:A CPU 1 is connected to the interruption generators (INT1 - 16) 2 via an interruption l...

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Bibliographische Detailangaben
Hauptverfasser: OHASHI AKIHIRO, YAMAOKA HIROMASA, SAITOU SUMIHISA, TAKAKURA MITSUO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To attain a high speed process with the interruption control by connecting the interruption occurrence report signal lines of the interruption generators to the different data lines of a CPU. CONSTITUTION:A CPU 1 is connected to the interruption generators (INT1 - 16) 2 via an interruption line 4, an interruption occurrence identification signal output timing line 5, and a data bus 3. In addition, the generators 2 are con nected to the CPU 1 via a single line 4 so that the generators 2 produce the interruptions of the same level to the CPU 1. Thus the CPU 1 can decide at a high speed the interruption generator that produced an interruption regardless of the number of interruption generators when an interruption is produced to the CPU 1.