INSTRUCTION EXCUTING METHOD AND SYSTEM

PURPOSE: To shorten the execution time of an instruction stream by using the operation mechanism of a main processor to simultaneously execute another instruction in the shared stream before completion of execution of a preceding instruction in a coprocessor. CONSTITUTION: A main processor 110 execu...

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Bibliographische Detailangaben
Hauptverfasser: TOOMASU JIYOSEFU BIIKOMU, SUKOTSUTO AREN HIRUKAA, DANIERU GAI YANGU, MAAKU ROBAATO FUANKU, JIEFURII DAGURASU BURAUN
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE: To shorten the execution time of an instruction stream by using the operation mechanism of a main processor to simultaneously execute another instruction in the shared stream before completion of execution of a preceding instruction in a coprocessor. CONSTITUTION: A main processor 110 executes non-floating-point instructions, and a coprocessor 120 executes only floating-point instructions. Data routes and operations of processors are controlled by control words held in a control storage 130, and the address of the next control word to be executed is designated. Data is transferred between two processors 110 and 120 by a normal processor bus 111, and execution of control words in the main processor 110 is inhibited by a holding line 112. Thus different instructions are executed in parallel while keeping the successive operation or the instruction stream and accurate exceptional interrupts.