BUS SIZE CONVERTING DEVICE

PURPOSE:To attain the conversion between 16 bits and 8 bits by outputting the signals for control of the 1st and 2nd bidirectional buffers, a data latch, and an address buffer and at the same time outputting the lowest rank bit of an address to the address buffer. CONSTITUTION:The 16-bit data is div...

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1. Verfasser: HIRASHIMA AKIRA
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To attain the conversion between 16 bits and 8 bits by outputting the signals for control of the 1st and 2nd bidirectional buffers, a data latch, and an address buffer and at the same time outputting the lowest rank bit of an address to the address buffer. CONSTITUTION:The 16-bit data is divided into the higher rank 8-bit data and the lower rank 8-bit data in a writing operation state where the 16-bit data is sent to the outside from a CPU 1. Then the higher and lower rank data are sent to an 8-bit bus via the bidirectional buffers 3 and 4. While the lower rank byte data is latched by a data latch 5 in a reading operation state where the 16-bit data is sent to the CPU 1 from the outside. Then the higher rank byte data is outputted to a data bus of the CPU 1 in the timing coincident with the higher rank byte data. A control circuit 16 detects the access state of the CPU 1 and produces a control signal, and the bus size converting operation is controlled with the output signal of the circuit 16. Thus a 16-bit CPU can have accesses to a device, a memory, etc., corresponding to an external 8-bit CPU.