BI-CMOS LOGIC CIRCUIT

PURPOSE: To attain a maximum swing providing a desired CMOS compatibility to a BICMOS logic circuit by connecting an interface circuit means to an output terminal of the BICMOS logic circuit. CONSTITUTION: An interface circuit C1 executing the same logic function of a BICMOS circuit 11 such as an AN...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: PIEERU MORIE, JIYAN POORU NIITSU, FURANKU WARAARU, JIERAARU BUDON, PASUKARU TANOFU, ENGU ONGU
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE: To attain a maximum swing providing a desired CMOS compatibility to a BICMOS logic circuit by connecting an interface circuit means to an output terminal of the BICMOS logic circuit. CONSTITUTION: An interface circuit C1 executing the same logic function of a BICMOS circuit 11 such as an AND function is connected to a terminal 15 of the circuit 11. The interface circuit C1 includes 4 FETs, 2 NFETs N6, N7 and 2 PFETs, P3, P4. The interface circuit C1 operated even singly provide desired heavy load drive capability to the BICMOS circuit 11 and gives a maximum voltage swing required for the CMOS/BICMOS compatibility. Thus, the improved BICMOS circuit is formed by the combination of the circuit 11 and the interface circuit C1 with an excellent characteristic and the compatibility with the CMOS is attained.