SEMICONDUCTOR MEMORY

PURPOSE:To obtain a semiconductor memory in which differential amplifications at many times is not needed even when many memory blocks are controlled with one Y address decoder and in which an address time is short with a low energy consumption by adding a driving gate IO line to each memory block a...

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1. Verfasser: IBARAKI AKIRA
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To obtain a semiconductor memory in which differential amplifications at many times is not needed even when many memory blocks are controlled with one Y address decoder and in which an address time is short with a low energy consumption by adding a driving gate IO line to each memory block and discharging a precharged charge of a pair of data lines to exist between a pair of data lines to be selected and the Y address decoder. CONSTITUTION:For example, to a pair of data lines 29a and 29b provided for each memory block, a transmission gate 3a and a drive gate 21a are arranged, and further, IO lines 22a and 22b are arranged for each memory block. By discharging the precharged charge of the pair of data lines to exist between the pair of data lines to be selected and a Y address decoder 1, a Y address selecting signal is transmitted to the pair of data lines to be selected, and data outputted to the pair of data lines to be selected are outputted to the IO line of the memory block. Namely, the Y address selecting signal of the Y address decoder 1 is transmitted up to the memory block of the pair of data lines to be selected. Thus, the executions of the differential amplifications at many times is not needed, a time spent for the differential amplification can be saved, and an access time can be shortened.