METHOD FOR TESTING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

PURPOSE:To secure the high speediness and the reliability of test by executing an FIFO action synchronously with a system clock in a semiconductor integrated circuit device and executing the test with the aid of the actual action of an internal circuit block. CONSTITUTION:An FIFO memory 7 accumulates test data SDIN which is scanned in from the outside. This action is executed comparatively at a low speed because the test data SDIN is scanned in synchronously with a scan clock SCCK. Next, the accumulated data SDIN is inputted to the block 4 in the semiconductor integrated circuit device 1. At this time, it is inputted at the actual action speed of the device 1 by being synchronized with the system clock SYSCK of the device 1. The output data which is tested by the high-speed action is accumulated in the memory 7 and the internal state can be known comparatively at a low speed by fetching the data synchronously with the SCCK. Thus, the scan-in and the scan-out are execute at a low speed and the test is executed under the state of the actual action and at a real time.