FILTERING PROCESSOR

PURPOSE:To shorten a time necessary for a filtering processing by simultaneously reading data for plural pixels in parallel, and simultaneously executing prescribed weighting for each pixel. CONSTITUTION:When the address of the pixel to execute the filtering processing for an address counter 20 of a read control means 89 is generated, the plural read addresses are simultaneously generated by adders 21 to 28, and set at registers 34 to 42. Next, the pixel values are simultaneously read from respective memories 43 to 51, set at registers 52 to 60, and the respective pixel values are weighted by multipliers 61 to 69. Further, the multiplied outputs of the multipliers 61 to 69 are set at the registers 70 to 78, the adding processings of the registers 70 to 78 are executed by an adder means 79, and the added output is set at a register 80, and written into a memory 81.