JPH0217971B

PURPOSE:To decrease the number of transistors(TRs) of a circuit satisfying a plurality of logics, by providing a complementary P type logical circuit with a circuit viewing a reference potential from a specific node of an N type circuit of a complementary logical circuit consisting of P and N type T...

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1. Verfasser: YASUDA SADAHIRO
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To decrease the number of transistors(TRs) of a circuit satisfying a plurality of logics, by providing a complementary P type logical circuit with a circuit viewing a reference potential from a specific node of an N type circuit of a complementary logical circuit consisting of P and N type TRs. CONSTITUTION:In series connecting a logical circuit 11 consisting of P type MOS Trs QPA-QPE and a logical circuit 12 consisting of N type MOSTRs QNA-QNE complementary with the circuit 11, when signals A-E of logics 1, 0 are applied to the gate of each TR, the 1st logic X=inversion (A.B+C.D.E) is outputted from a connecting point 14. In connecting a logical circuit 20 consisting of P type MOSTRs QPA''-QPE'' being the complementary relation with the circuit viewing the reference potential 16 from a connecting point 21 of the circuit 12 is connected between the connecting point 21 and a power supply 15, the 2nd logic Y=inversion (A.B.C.D+E) is outputted from the connecting point 21 to an output point 22. A complemetnary circuit consisting of a circuit viewing a reference potential, the circuits 11, 12 and 20, and a connecting point 21 are independently operated, and logics X, Y are outputted respectively to terminals 14 and 22 with less number of TRs.