MANUFACTURE OF SEMICONDUCTOR DEVICE

PURPOSE:To obtain a wiring layer having a flat property in a wiring scheduled area by forming a seed having electrical conductivity on the wiring scheduled area on a semiconductor substrate, and growing the wiring layer from the seed sheet. CONSTITUTION:There is formed an aluminum thin film 14 as a...

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Bibliographische Detailangaben
Hauptverfasser: ITABASHI YASUSHI, SHIRAI KENICHI, SAITO YASUYUKI, TSURUGAI TAKASHI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To obtain a wiring layer having a flat property in a wiring scheduled area by forming a seed having electrical conductivity on the wiring scheduled area on a semiconductor substrate, and growing the wiring layer from the seed sheet. CONSTITUTION:There is formed an aluminum thin film 14 as a seed sheet on the upper surface of a p type semiconductor substrate 10 including two diffusion layers 11, 12 formed on the surface of the substrate through an insulating layer 13 such as a silicon oxide film, etc. For the seed sheet 14, only selective areas (namely, upper portions of the n type diffusion layers 11, 12 as wiring scheduled areas and an upper portions of the insulating layer 13 between the two diffusion layers) are left behind and other portions are removed. Then, a silicon oxide film 16 is formed at portions other than the wiring scheduled areas by a CVD process. A conductive material is grown with the seed sheet 14 as a nucleus so as to be substantially flush with the adjacent oxide film 16 by a selective CVD process, to form a wiring layer 18. A flatness property is improved, and broken failure of wiring layers and unexpected formation of any wiring pattern, prior problems, are eliminated.