BI-CMOS CIRCUIT
PURPOSE:To enable the saturation control of a bipolar NPN transistor through an N channel MOS transistor by a method wherein a drain and a gate of the N channel MOS transistor are connector to a base of the NPN transistor and the source is connected to the collector of the NPN transistor. CONSTITUTI...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | PURPOSE:To enable the saturation control of a bipolar NPN transistor through an N channel MOS transistor by a method wherein a drain and a gate of the N channel MOS transistor are connector to a base of the NPN transistor and the source is connected to the collector of the NPN transistor. CONSTITUTION:In a Bi-CMOS circuit, the drain and the gate of an N channel MOS transistor 2 are connected to the base of an NPN transistor 1, and the source is connected with the collector of the transistor 1. When a forward bias is applied between the base and emitter of the NPN transistor 1, a bias current flows, the PNP transistor 1 is turned into an ON state, and a collector potential decreases. When a voltage VBC between the base and collector is equal to a threshold voltage VTHN of the N channel MOS transistor 2, the N channel MOS transistor 2 grows in a conductive state and an excessive base current flows through the collector of the NPN transistor 1 through the intermediary of the N channel MOS transistor 2. By these processes, the PNP transistor 1 is prevented from growing into a deeply saturated state. |
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