DATA TRANSFER SYSTEM

PURPOSE:To transfer data at high speed and to decrease the load of a local processor by controlling a dual port RAM and a buffer, and using a buffer controller, which outputs an address to the dual port RAM. CONSTITUTION:When the data are transferred from a host processor 1 side to an input/output d...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: NAGASE RYOICHI, SAKAMAKI TSUTOMU
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To transfer data at high speed and to decrease the load of a local processor by controlling a dual port RAM and a buffer, and using a buffer controller, which outputs an address to the dual port RAM. CONSTITUTION:When the data are transferred from a host processor 1 side to an input/output device 5, the host processor 1 sets the top address of the data and the number of transferred words to a local processor 3, a buffer controller 8 follows the setting, and at first, starts a data reception processing from the host processor 1. Simultaneously the controller transfers the data to the input/output device 5 concerning the address at which the received data are established. When the data are transferred from the input/output device 5 to the host processor 1, the same procedure is carried out. As the advantage of the dual port RAM, the reception processing and transmission processing can be completely asynchronously advanced. Thus, without the effect of the difference of the bidirectional transfer speeds, the data can be efficiently transferred.