PLL LOCK DETECTION CIRCUIT FOR MOTOR
PURPOSE:To judge whether a recording can be executed or not by providing second latch means for latching the latch signal of first latch means, and detecting the look state of a PLL servo circuit according to the latch state of the second latch means. CONSTITUTION:A 'H' level is latched in...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | PURPOSE:To judge whether a recording can be executed or not by providing second latch means for latching the latch signal of first latch means, and detecting the look state of a PLL servo circuit according to the latch state of the second latch means. CONSTITUTION:A 'H' level is latched in a first D flip-flop circuit 3 at the falling edge of the output signal of a second multivibrator circuit 4. Thus, the 'H' level is latched in a second D flip-flop circuit 5 after the several pulses of the output signals of a phase comparator, i.e., when a PLL servo is effectively locked. The first flip-flop 3 might be frequently set and reset when the PLL servo does not become the lock state. In this case, since the second multivibrator circuit 4 is cleared by a 'L' level clear signal input to a bar RD terminal, no erroneous operation occurs. |
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