DUAL PORT MEMORY SYSTEM

PURPOSE:To reduce the number of signal lines in a dual port memory device by adding a latch circuit to the inside of the device. CONSTITUTION:Upper 5-bit address data A8 to A12 can be transferred to a memory 10 through a data line without passing the data through an address line by latching and fixing the data A8 to A12 by the 1st or 2nd latch circuit 25 or 26. Thereafter, data can be written/read out in/from the memory 10 in the dual port memory device 3 from master and slave control device 1, 2 by changing lower 8-bit address data A0 to A7. Although two latch control lines should be newly added, 10 address lines can be reduced.