MEMORY DEVICE

PURPOSE:To properly cope with the extension of memory cell units MCU by using an MCU that can input the address information larger than that which can be inputted to a data MCU as a parity MCU. CONSTITUTION:A parity MCU 3 can designate an address larger than that of a data MCU 1a. In other words, th...

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Bibliographische Detailangaben
Hauptverfasser:	KADOMA TATSUO, SUGINO KAZUHITO
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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Beschreibung
Zusammenfassung:	PURPOSE:To properly cope with the extension of memory cell units MCU by using an MCU that can input the address information larger than that which can be inputted to a data MCU as a parity MCU. CONSTITUTION:A parity MCU 3 can designate an address larger than that of a data MCU 1a. In other words, the MCU 3 can designate 1M of addresses AD against 256K of ADs that can be designated by the MCU 1a. In the case the total number of ADs that can be designated by the MCU 1a of the basic side is equal to 512K, for example, 512K are used for storage of the parity information out of 1M of ADs of the MCU 3. Thus the remaining 512K are not used. This unused memory space is used for the parity information of the data MCU 1b to be extended. Thus it is possible to reduce the extension part of the MCU 3 which is necessary in accordance with the extension of the MCU 1b.