DIGITAL TRANSMISSION SYSTEM

PURPOSE:To obtain a low speed digital data via a high speed transmission link by using an identification circuit so as to apply speed conversion processing. CONSTITUTION:A low speed digital data Xb/s at the sender side is supplied to a speed conversion circuit 15 through a line termination circuit 1...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: TSUYUKI SHIGERU, ASATANI KOICHI, ISHIKURA AKIHIKO
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:PURPOSE:To obtain a low speed digital data via a high speed transmission link by using an identification circuit so as to apply speed conversion processing. CONSTITUTION:A low speed digital data Xb/s at the sender side is supplied to a speed conversion circuit 15 through a line termination circuit 11 and converted into a high speed digital data Yb/s at the speed conversion circuit 15. The high speed digital data subject to speed conversion is fed to a line 14 via a high speed transmission link 13, the high speed digital data at the receiver side is fed to the speed conversion circuit 15 via the high speed transmission link 13 and the data is converted into a low speed digital data of Xb/s at the speed conversion circuit 15. That is, the data is fed to an identification 21 comprising a D flip-flop and a timing extraction circuit 22 in the speed conversion circuit 15, the data is identified and processed and a low speed digital data is obtained. Thus, the high speed transmission link is used without implementing complicated frame synchronization multiplex processing to attain low speed digital data transmission.