INTEGRATED CIRCUIT

PURPOSE:To obtain an economic circuit with less current consumption by forming an IC constant voltage circuit by means of six transistors including two transistors whose gates are reverse conduting type and whose impurity density differs. CONSTITUTION:The depression type PMOS transistor (TR) 1 where...

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1. Verfasser: YOKOUCHI HIDEAKI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To obtain an economic circuit with less current consumption by forming an IC constant voltage circuit by means of six transistors including two transistors whose gates are reverse conduting type and whose impurity density differs. CONSTITUTION:The depression type PMOS transistor (TR) 1 where a reference voltage corresponding to a positive side power voltage VDD is added to the gate supplies a constant current to TR 2 and 3 forming an operand amplifier with enhancement type NMOS TR 4 and 5. The constant voltage IC circuit is formed by enhancement type NMOS TR 6 for constant voltage supply and the like in which the gate and a source are respectively connected to the drain of TR 2 and the negative side power voltage VSS and the drain to a load 7. TR 2 and 3 in which the voltage VDD and the drain output voltage of TR 6 are impressed on respective bases have different impurity density of substrates, and they are set to be gate material P type depression type ad the N type enhancement type. The threshold voltage of a work function difference and the sum of a channel dope can be obtained without using the resistances, and the economic constant voltage IC circuit can be obtained with less current consumption.