MULTIPLE DATA MULTIPLEXING SYSTEM

PURPOSE:To effectively use a transmitting line by controlling which to insert, either a frame pattern bit or communication data, into a frame pattern bit position and executing multiplexing. CONSTITUTION:When a changeover control signal is inputted to a SEL 30, the signal switches the SEL 30 so that...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: SHIMURA TAKU
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PURPOSE:To effectively use a transmitting line by controlling which to insert, either a frame pattern bit or communication data, into a frame pattern bit position and executing multiplexing. CONSTITUTION:When a changeover control signal is inputted to a SEL 30, the signal switches the SEL 30 so that it selects F at the time of inserting a frame pattern bit F and selects D7 at the time of inserting communication data and outputs to a parallel serial P/S converter 31. The P/S converter 31 serially outputs an 8-bit parallel input to an opposite station. On the other hand, a synchronization detecting circuit SYND 32 checks the frame pattern bit F and executes multi-frame synchronization detection only when a synchronization detecting control signal is inputted. Further, when the SYND 32 does not execute multi-frame synchronization detection, communication data inputted to the P/S converter 31 is gone through as it is and outputted to a DTE. Thus, a data terminal equipment can receive 8-bit communication data without any transmitting speed limitation.