DATA TRANSMISSION EQUIPMENT

PURPOSE:To set simply a parity bit at a high speed by setting the parity bit to a mark state of the polarity opposite to the polarity of the mark state of the start bit when the polarity is coincident with the polarity of the mark state of the start bit and setting the parity bit in the idle state i...

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Bibliographische Detailangaben
Hauptverfasser: TAJIMA TAIJI, OKAWA SHUJI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To set simply a parity bit at a high speed by setting the parity bit to a mark state of the polarity opposite to the polarity of the mark state of the start bit when the polarity is coincident with the polarity of the mark state of the start bit and setting the parity bit in the idle state in case of dissidence. CONSTITUTION:A storage circuit 71 stores the polarity of '0' just before the generation of a parity bit. A comparator circuit 72 compares the output of a storage circuit 70 with an output of the storage circuit 71 and when they are coincident, the 1st transmission circuit 73 is selected and in case of dissidence, the 2nd transmission circuit 74 is selected. Thus, the parity bit is set by having only to the polarity of '0' just before the parity bit with the polarity of '0' of the start bit.