SYNCHRONIZATION

PURPOSE: To add a little correction to a standard processor control hardware so as to efficiently execute branching with a condition for synchronizing processor-to-processor communication by connecting two tests for synchronization by means of a single instruction. CONSTITUTION: The standard controller adds a control store address register 21, an operation register 22 and a cycle counter 24. An AND gate 32 and OR gates 33-35 are added to the standard hardware so that the two tests for synchronization is connected by the single instruction. The instruction executes the both tests in a time being not longer than the one required for executing the single test.