CIRCUIT FOR SIMPLIFYING LSI DIAGNOSIS

PURPOSE:To make the number of test patterns as small as the number of input pins multiplied by 3 by a method wherein at the time of diagnosing an LSI, after an input signal is passed through an external buffer gate from an input pin, it is reached to an output pin through an external buffer gate as it is via a bypass circuit to be an output signal. CONSTITUTION:A high level signal is given to a diagnosis control pin 1 to make it pass an input buffer gate, and input to an AND gate as an inverted low level signal. An output signal 10 of an LSI internal logic circuit 7 is prevented at the AND gate 12, and respective input pins 2 are assigned with addresses of I1-In. When a pin I2 among the input pins is to be diagnosed, a high level signal is given to it, a bit address signal according to the address I is given to an input address selection pin 3, and input to an address decoder 4 via a buffer gate. As a result, the output signal of the AND gate 5 is high in level to be input to an OR gate 6 and signals not corresponding to the address I2 become low level and not output.