COMPLEMENTARY TYPE SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
PURPOSE:To prevent latch-up and to simplify the configuration of external devices, by providing, when a voltage to be supplied to a complementary semiconductor integrated circuit is applied, a means for delaying said voltage after the applying time of a voltage to be supplied to a substrate is delay...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | PURPOSE:To prevent latch-up and to simplify the configuration of external devices, by providing, when a voltage to be supplied to a complementary semiconductor integrated circuit is applied, a means for delaying said voltage after the applying time of a voltage to be supplied to a substrate is delayed. CONSTITUTION:A voltage AVCC to be supplied to a complementary type integrated circuit 5 on a substrate 4 is applied to a power source terminal 2. A voltage VCC to be supplied to the substrate 4 including the complementary type semiconductor structure is applied to a power source terminal 1. A delaying means 3 delays the voltage AVCC until a time point after a time point when the voltage VCC is applied to the power source terminal 1. Then, the delayed voltage AVCC is supplied to the complementary type semiconductor integrated circuit 5. In this constitution, the voltage AVCC is always applied later than the voltage VCC regardless of the application timing between the voltage VCC and the voltage AVCC which are applied to the power source terminal 1 and the power source terminal 2. The latch-up phenomenon of the complementary semiconductor integrated circuit can be prevented. The configuration of an external device for setting the input order of the power source voltages can be simplified. |
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