VECTOR PROCESSOR

PURPOSE:To practically double a memory through-put and to improve speed when a partial differential equation is resolved with a difference method by improving the efficiency of a memory requester. CONSTITUTION:In a logic part VSD to send data to a vector register 109 corresponding to the memory requester of a main storing control part, a strage buffer part SB composed of plural storing units is provided and in a storage buffer part SB to be composed of the plural storing units, each chaining control mechanism and a control mechanism executing the switching control of the output destination of the strage buffer equipped in correspondence to an element are equipped. Since a VLSB instruction reads vector data from the strage buffer in the VSD and sends the data to a reading vector register, the efficiency of the memory requester is improved and allowed to be almost double.