INTERRUPTION CIRCUIT

PURPOSE:To prevent unnecessary initial setting and to eliminate a trouble or an accident by causing a CPU to have function to output the executing condition of an interruption processing program to an external part in the shape of an output signal and providing a circuit to prohibit the input of a reset signal to the CPU with the output signal. CONSTITUTION:An external output terminal OUT of a CPU40 is controlled by the interruption processing program and when the CPU40 executes the interruption processing program, the external output terminal OUT goes to H. Thus, an output side N3 of a NAND gate 72 goes to H and a reset input terminal inverting RES goes to non-active. Accordingly, the input of a reset signal 60S is prohibited and the input of an interrupting signal 50S gets priority. When the interrupting signal 50S and reset signal 60S are simultaneously generated, the interrupting signal 50S is inputted top the CPU40 with priority. Namely, when a power source voltage is lowered and a system is instable, data are saved without fail and emergency stop is executed. Then, the causes of the trouble or accident are erased and the recovery work of the unnecessary initial set is eliminated.